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authorPacien TRAN-GIRARD2014-06-13 16:06:19 +0200
committerPacien TRAN-GIRARD2014-06-13 16:06:19 +0200
commit70318492f3472ff2ec3b1735cf69a4eef1f6a51d (patch)
tree0f4243099ea9379bc164dc37a9fee3ab255f0f7e /FPGA/pwm/lpm_counter1.cmp
parentd091bb2cb82f66d187df8f3aba6afcf4041b72ce (diff)
downloadfpga-home-automation-70318492f3472ff2ec3b1735cf69a4eef1f6a51d.tar.gz
Update project
Diffstat (limited to 'FPGA/pwm/lpm_counter1.cmp')
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1--Copyright (C) 1991-2013 Altera Corporation
2--Your use of Altera Corporation's design tools, logic functions
3--and other software and tools, and its AMPP partner logic
4--functions, and any output files from any of the foregoing
5--(including device programming or simulation files), and any
6--associated documentation or information are expressly subject
7--to the terms and conditions of the Altera Program License
8--Subscription Agreement, Altera MegaCore Function License
9--Agreement, or other applicable license agreement, including,
10--without limitation, that your use is for the sole purpose of
11--programming logic devices manufactured by Altera and sold by
12--Altera or its authorized distributors. Please refer to the
13--applicable agreement for further details.
14
15
16component lpm_counter1
17 PORT
18 (
19 aclr : IN STD_LOGIC ;
20 clock : IN STD_LOGIC ;
21 q : OUT STD_LOGIC_VECTOR (22 DOWNTO 0)
22 );
23end component;