From 70318492f3472ff2ec3b1735cf69a4eef1f6a51d Mon Sep 17 00:00:00 2001 From: Pacien TRAN-GIRARD Date: Fri, 13 Jun 2014 16:06:19 +0200 Subject: Update project --- FPGA/display/clock_divider.bsf | 61 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 FPGA/display/clock_divider.bsf (limited to 'FPGA/display/clock_divider.bsf') diff --git a/FPGA/display/clock_divider.bsf b/FPGA/display/clock_divider.bsf new file mode 100644 index 0000000..de8cb37 --- /dev/null +++ b/FPGA/display/clock_divider.bsf @@ -0,0 +1,61 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2013 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 16 16 176 96) + (text "clock_divider" (rect 5 0 56 12)(font "Arial" )) + (text "inst" (rect 8 64 20 76)(font "Arial" )) + (port + (pt 0 32) + (input) + (text "clk" (rect 0 0 10 12)(font "Arial" )) + (text "clk" (rect 21 27 31 39)(font "Arial" )) + (line (pt 0 32)(pt 16 32)(line_width 1)) + ) + (port + (pt 0 48) + (input) + (text "resetn" (rect 0 0 24 12)(font "Arial" )) + (text "resetn" (rect 21 43 45 55)(font "Arial" )) + (line (pt 0 48)(pt 16 48)(line_width 1)) + ) + (port + (pt 160 32) + (output) + (text "en_user" (rect 0 0 33 12)(font "Arial" )) + (text "en_user" (rect 106 27 139 39)(font "Arial" )) + (line (pt 160 32)(pt 144 32)(line_width 1)) + ) + (parameter + "board_frequency" + "50000000.0" + "" + (type "PARAMETER_SIGNED_FLOAT") ) + (parameter + "user_frequency" + "4.0" + "" + (type "PARAMETER_SIGNED_FLOAT") ) + (drawing + (rectangle (rect 16 16 144 64)(line_width 1)) + ) + (annotation_block (parameter)(rect 176 -64 276 16)) +) -- cgit v1.2.3