From 70318492f3472ff2ec3b1735cf69a4eef1f6a51d Mon Sep 17 00:00:00 2001 From: Pacien TRAN-GIRARD Date: Fri, 13 Jun 2014 16:06:19 +0200 Subject: Update project --- FPGA/display/clock_divider.bsf | 61 +++ FPGA/display/display.bdf | 369 ++++++++++--- FPGA/display/display.bsf | 83 ++- FPGA/display/display.qsf | 7 + FPGA/display/display.qws | Bin 1438 -> 1438 bytes FPGA/display/greybox_tmp/cbx_args.txt | 7 + FPGA/display/lpm_constant7nada.bsf | 49 ++ FPGA/display/lpm_constant7nada.cmp | 21 + FPGA/display/lpm_constant7nada.qip | 5 + FPGA/display/lpm_constant7nada.vhd | 109 ++++ FPGA/display/lpm_constant_a.bsf | 10 +- FPGA/display/lpm_constant_a.qip | 5 + FPGA/display/lpm_constant_a.vhd | 2 +- FPGA/display/lpm_constant_f.qip | 0 FPGA/display/lpm_counter0.qip | 0 FPGA/display/lpm_shiftreg0.bsf | 86 +++ FPGA/display/lpm_shiftreg0.cmp | 26 + FPGA/display/lpm_shiftreg0.qip | 5 + FPGA/display/lpm_shiftreg0.vhd | 146 +++++ FPGA/display/useless.bdf | 968 ++++++++++++++++++++++++++++++++++ FPGA/display/useless.bsf | 71 +++ 21 files changed, 1943 insertions(+), 87 deletions(-) create mode 100644 FPGA/display/clock_divider.bsf create mode 100644 FPGA/display/greybox_tmp/cbx_args.txt create mode 100644 FPGA/display/lpm_constant7nada.bsf create mode 100644 FPGA/display/lpm_constant7nada.cmp create mode 100644 FPGA/display/lpm_constant7nada.qip create mode 100644 FPGA/display/lpm_constant7nada.vhd create mode 100644 FPGA/display/lpm_constant_a.qip create mode 100644 FPGA/display/lpm_constant_f.qip create mode 100644 FPGA/display/lpm_counter0.qip create mode 100644 FPGA/display/lpm_shiftreg0.bsf create mode 100644 FPGA/display/lpm_shiftreg0.cmp create mode 100644 FPGA/display/lpm_shiftreg0.qip create mode 100644 FPGA/display/lpm_shiftreg0.vhd create mode 100644 FPGA/display/useless.bdf create mode 100644 FPGA/display/useless.bsf (limited to 'FPGA/display') diff --git a/FPGA/display/clock_divider.bsf b/FPGA/display/clock_divider.bsf new file mode 100644 index 0000000..de8cb37 --- /dev/null +++ b/FPGA/display/clock_divider.bsf @@ -0,0 +1,61 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2013 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 16 16 176 96) + (text "clock_divider" (rect 5 0 56 12)(font "Arial" )) + (text "inst" (rect 8 64 20 76)(font "Arial" )) + (port + (pt 0 32) + (input) + (text "clk" (rect 0 0 10 12)(font "Arial" )) + (text "clk" (rect 21 27 31 39)(font "Arial" )) + (line (pt 0 32)(pt 16 32)(line_width 1)) + ) + (port + (pt 0 48) + (input) + (text "resetn" (rect 0 0 24 12)(font "Arial" )) + (text "resetn" (rect 21 43 45 55)(font "Arial" )) + (line (pt 0 48)(pt 16 48)(line_width 1)) + ) + (port + (pt 160 32) + (output) + (text "en_user" (rect 0 0 33 12)(font "Arial" )) + (text "en_user" (rect 106 27 139 39)(font "Arial" )) + (line (pt 160 32)(pt 144 32)(line_width 1)) + ) + (parameter + "board_frequency" + "50000000.0" + "" + (type "PARAMETER_SIGNED_FLOAT") ) + (parameter + "user_frequency" + "4.0" + "" + (type "PARAMETER_SIGNED_FLOAT") ) + (drawing + (rectangle (rect 16 16 144 64)(line_width 1)) + ) + (annotation_block (parameter)(rect 176 -64 276 16)) +) diff --git a/FPGA/display/display.bdf b/FPGA/display/display.bdf index c40e75b..fb2a670 100644 --- a/FPGA/display/display.bdf +++ b/FPGA/display/display.bdf @@ -22,8 +22,8 @@ applicable agreement for further details. (pin (input) (rect 96 48 272 64) - (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) - (text "fan_auto" (rect 9 0 52 11)(font "Arial" )) + (text "INPUT" (rect 133 0 162 10)(font "Arial" (font_size 6))) + (text "fan_auto" (rect 9 0 53 11)(font "Arial" )) (pt 176 8) (drawing (line (pt 92 12)(pt 117 12)) @@ -33,13 +33,14 @@ applicable agreement for further details. (line (pt 117 4)(pt 121 8)) (line (pt 117 12)(pt 121 8)) ) - (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) + (text "VCC" (rect 136 7 157 17)(font "Arial" (font_size 6))) + (annotation_block (location)(rect 32 64 96 80)) ) (pin (input) (rect 96 64 272 80) - (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) - (text "alarm_user" (rect 9 0 65 11)(font "Arial" )) + (text "INPUT" (rect 133 0 162 10)(font "Arial" (font_size 6))) + (text "alarm_user" (rect 9 0 66 11)(font "Arial" )) (pt 176 8) (drawing (line (pt 92 12)(pt 117 12)) @@ -49,12 +50,13 @@ applicable agreement for further details. (line (pt 117 4)(pt 121 8)) (line (pt 117 12)(pt 121 8)) ) - (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) + (text "VCC" (rect 136 7 157 17)(font "Arial" (font_size 6))) + (annotation_block (location)(rect 32 80 96 96)) ) (pin (input) (rect 96 80 272 96) - (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) + (text "INPUT" (rect 133 0 162 10)(font "Arial" (font_size 6))) (text "speed[1..0]" (rect 9 0 64 11)(font "Arial" )) (pt 176 8) (drawing @@ -65,12 +67,45 @@ applicable agreement for further details. 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(line (pt 82 8)(pt 78 12)) (line (pt 78 12)(pt 82 8)) ) + (annotation_block (location)(rect 936 64 992 80)) ) (pin (output) (rect 760 64 936 80) - (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) (text "hex6[6..0]" (rect 90 0 138 11)(font "Arial" )) (pt 0 8) (drawing @@ -98,11 +134,12 @@ applicable agreement for further details. (line (pt 82 8)(pt 78 12)) (line (pt 78 12)(pt 82 8)) ) + (annotation_block (location)(rect 936 80 992 96)) ) (pin (output) - (rect 760 80 936 96) - (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) + (rect 760 104 936 120) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) (text "hex4[6..0]" (rect 90 0 138 11)(font "Arial" )) (pt 0 8) (drawing @@ -114,10 +151,96 @@ applicable agreement for further details. (line (pt 82 8)(pt 78 12)) (line (pt 78 12)(pt 82 8)) ) + (annotation_block (location)(rect 936 120 992 136)) +) +(pin + (output) + (rect 760 88 936 104) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) + (text "hex5[6..0]" (rect 90 0 138 11)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) + (annotation_block (location)(rect 936 104 992 120)) +) +(pin + (output) + (rect 760 176 936 192) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) + (text "hex0[6..0]" (rect 90 0 138 11)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) + (annotation_block (location)(rect 936 192 1000 208)) +) +(pin + (output) + (rect 760 160 936 176) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) + (text "hex1[6..0]" (rect 90 0 138 11)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) + (annotation_block (location)(rect 936 176 1000 192)) +) +(pin + (output) + (rect 760 144 936 160) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) + (text "hex2[6..0]" (rect 90 0 138 11)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) + (annotation_block (location)(rect 936 160 1008 176)) +) +(pin + (output) + (rect 760 128 936 144) + (text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6))) + (text "hex3[6..0]" (rect 90 0 138 11)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) + (annotation_block (location)(rect 936 144 1000 160)) ) (symbol (rect 216 544 248 576) - (text "GND" (rect 8 16 29 26)(font "Arial" (font_size 6))) + (text "GND" (rect 8 16 30 26)(font "Arial" (font_size 6))) (text "inst1" (rect 3 21 26 32)(font "Arial" )(invisible)) (port (pt 16 0) @@ -134,8 +257,8 @@ applicable agreement for further details. ) (symbol (rect 392 496 568 576) - (text "seven_segment_decoder" (rect 5 0 130 11)(font "Arial" )) - (text "fan_speed" (rect 8 64 59 75)(font "Arial" )) + (text "seven_segment_decoder" (rect 5 0 131 11)(font "Arial" )) + (text "fan_speed" (rect 8 64 61 75)(font "Arial" )) (port (pt 0 32) (input) @@ -147,7 +270,7 @@ applicable agreement for further details. (pt 176 32) (output) (text "hex[6..0]" (rect 0 0 42 11)(font "Arial" )) - (text "hex[6..0]" (rect 120 27 155 38)(font "Arial" )) + (text "hex[6..0]" (rect 120 27 162 38)(font "Arial" )) (line (pt 176 32)(pt 160 32)(line_width 3)) ) (parameter @@ -162,8 +285,8 @@ applicable agreement for further details. ) (symbol (rect 392 624 568 704) - (text "seven_segment_decoder" (rect 5 0 130 11)(font "Arial" )) - (text "a" (rect 8 64 15 75)(font "Arial" )) + (text "seven_segment_decoder" (rect 5 0 131 11)(font "Arial" )) + (text "a" (rect 8 64 16 75)(font "Arial" )) (port (pt 0 32) (input) @@ -175,7 +298,7 @@ applicable agreement for further details. (pt 176 32) (output) (text "hex[6..0]" (rect 0 0 42 11)(font "Arial" )) - (text "hex[6..0]" (rect 120 27 155 38)(font "Arial" )) + (text "hex[6..0]" (rect 120 27 162 38)(font "Arial" )) (line (pt 176 32)(pt 160 32)(line_width 3)) ) (parameter @@ -190,8 +313,8 @@ applicable agreement for further details. ) (symbol (rect 392 752 568 832) - (text "seven_segment_decoder" (rect 5 0 130 11)(font "Arial" )) - (text "f" (rect 8 64 11 75)(font "Arial" )) + (text "seven_segment_decoder" (rect 5 0 131 11)(font "Arial" )) + (text "f" (rect 8 64 12 75)(font "Arial" )) (port (pt 0 32) (input) @@ -203,7 +326,7 @@ applicable agreement for further details. (pt 176 32) (output) (text "hex[6..0]" (rect 0 0 42 11)(font "Arial" )) - (text "hex[6..0]" (rect 120 27 155 38)(font "Arial" )) + (text "hex[6..0]" (rect 120 27 162 38)(font "Arial" )) (line (pt 176 32)(pt 160 32)(line_width 3)) ) (parameter @@ -218,34 +341,34 @@ applicable agreement for further details. ) (symbol (rect 424 320 536 408) - (text "BUSMUX" (rect 28 0 95 16)(font "Arial" (font_size 10))) - (text "inst10" (rect 3 77 37 90)(font "Arial" (font_size 8))) + (text "BUSMUX" (rect 28 0 96 16)(font "Arial" (font_size 10))) + (text "inst10" (rect 3 77 38 90)(font "Arial" (font_size 8))) (port (pt 0 64) (input) - (text "datab[WIDTH-1..0]" (rect 6 51 111 64)(font "Arial" (font_size 8))) - (text "datab[]" (rect 6 51 44 64)(font "Arial" (font_size 8))) + (text "datab[WIDTH-1..0]" (rect 6 51 112 64)(font "Arial" (font_size 8))) + (text "datab[]" (rect 6 51 46 64)(font "Arial" (font_size 8))) (line (pt 0 64)(pt 44 64)(line_width 3)) ) (port (pt 56 88) (input) - (text "sel" (rect 59 70 75 83)(font "Arial" (font_size 8))) - (text "sel" (rect 59 70 75 83)(font "Arial" (font_size 8))) + (text "sel" (rect 59 70 76 83)(font "Arial" (font_size 8))) + (text "sel" (rect 59 70 76 83)(font "Arial" (font_size 8))) (line (pt 56 88)(pt 56 72)) ) (port (pt 0 32) (input) - (text "dataa[WIDTH-1..0]" (rect 6 19 111 32)(font "Arial" (font_size 8))) - (text "dataa[]" (rect 6 19 44 32)(font "Arial" (font_size 8))) + (text "dataa[WIDTH-1..0]" (rect 6 19 112 32)(font "Arial" (font_size 8))) + (text "dataa[]" (rect 6 19 46 32)(font "Arial" (font_size 8))) (line (pt 0 32)(pt 44 32)(line_width 3)) ) (port (pt 112 48) (output) - (text "result[WIDTH-1..0]" (rect 75 35 180 48)(font "Arial" (font_size 8))) - (text "result[]" (rect 75 35 106 48)(font "Arial" (font_size 8))) + (text "result[WIDTH-1..0]" (rect 75 35 181 48)(font "Arial" (font_size 8))) + (text "result[]" (rect 75 35 113 48)(font "Arial" (font_size 8))) (line (pt 68 48)(pt 112 48)(line_width 3)) ) (parameter @@ -255,7 +378,7 @@ applicable agreement for further details. " 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64" ) (drawing - (text "0" (rect 52 31 59 41)(font "Arial" (font_size 6))) + (text "0" (rect 52 31 60 41)(font "Arial" (font_size 6))) (text "1" (rect 52 55 57 65)(font "Arial" (font_size 6))) (line (pt 68 64)(pt 68 32)) (line (pt 44 80)(pt 44 16)) @@ -266,34 +389,34 @@ applicable agreement for further details. ) (symbol (rect 424 152 536 240) - (text "BUSMUX" (rect 28 0 95 16)(font "Arial" (font_size 10))) - (text "inst9" (rect 3 77 30 90)(font "Arial" (font_size 8))) + (text "BUSMUX" (rect 28 0 96 16)(font "Arial" (font_size 10))) + (text "inst9" (rect 3 77 31 90)(font "Arial" (font_size 8))) (port (pt 0 64) (input) - (text "datab[WIDTH-1..0]" (rect 6 51 111 64)(font "Arial" (font_size 8))) - (text "datab[]" (rect 6 51 44 64)(font "Arial" (font_size 8))) + (text "datab[WIDTH-1..0]" (rect 6 51 112 64)(font "Arial" (font_size 8))) + (text "datab[]" (rect 6 51 46 64)(font "Arial" (font_size 8))) (line (pt 0 64)(pt 44 64)(line_width 3)) ) (port (pt 56 88) (input) - (text "sel" (rect 59 70 75 83)(font "Arial" (font_size 8))) - (text "sel" (rect 59 70 75 83)(font "Arial" (font_size 8))) + (text "sel" (rect 59 70 76 83)(font "Arial" (font_size 8))) + (text "sel" (rect 59 70 76 83)(font "Arial" (font_size 8))) (line (pt 56 88)(pt 56 72)) ) (port (pt 0 32) (input) - (text "dataa[WIDTH-1..0]" (rect 6 19 111 32)(font "Arial" (font_size 8))) - (text "dataa[]" (rect 6 19 44 32)(font "Arial" (font_size 8))) + (text "dataa[WIDTH-1..0]" (rect 6 19 112 32)(font "Arial" (font_size 8))) + (text "dataa[]" (rect 6 19 46 32)(font "Arial" (font_size 8))) (line (pt 0 32)(pt 44 32)(line_width 3)) ) (port (pt 112 48) (output) - (text "result[WIDTH-1..0]" (rect 75 35 180 48)(font "Arial" (font_size 8))) - (text "result[]" (rect 75 35 106 48)(font "Arial" (font_size 8))) + (text "result[WIDTH-1..0]" (rect 75 35 181 48)(font "Arial" (font_size 8))) + (text "result[]" (rect 75 35 113 48)(font "Arial" (font_size 8))) (line (pt 68 48)(pt 112 48)(line_width 3)) ) (parameter @@ -303,7 +426,7 @@ applicable agreement for further details. " 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64" ) (drawing - (text "0" (rect 52 31 59 41)(font "Arial" (font_size 6))) + (text "0" (rect 52 31 60 41)(font "Arial" (font_size 6))) (text "1" (rect 52 55 57 65)(font "Arial" (font_size 6))) (line (pt 68 64)(pt 68 32)) (line (pt 44 80)(pt 44 16)) @@ -313,18 +436,18 @@ applicable agreement for further details. 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(text "inst21" (rect 8 33 37 44)(font "Arial" )) + (rect 424 48 536 96) + (text "lpm_constant_1" (rect 10 0 120 16)(font "Arial" (font_size 10))) + (text "inst" (rect 8 33 26 44)(font "Arial" )) (port (pt 112 24) (output) - (text "result[3..0]" (rect 0 0 59 13)(font "Arial" (font_size 8))) - (text "15" (rect 81 18 95 31)(font "Arial" (font_size 8))) + (text "result[6..0]" (rect 0 0 60 13)(font "Arial" (font_size 8))) + (text "127" (rect 75 18 97 31)(font "Arial" (font_size 8))) (line (pt 112 24)(pt 96 24)(line_width 3)) ) (drawing - (text "4" (rect 99 27 106 38)(font "Arial" )) + (text "7" (rect 99 27 107 38)(font "Arial" )) (line (pt 106 20)(pt 98 28)) (line (pt 16 16)(pt 16 32)) (line (pt 16 16)(pt 96 16)) @@ -369,18 +492,96 @@ applicable agreement for further details. ) ) (symbol - (rect 424 48 536 96) - (text "lpm_constant_1" (rect 10 0 120 16)(font "Arial" (font_size 10))) - (text "inst" (rect 8 33 25 44)(font "Arial" )) + (rect 688 -112 800 -64) + (text "lpm_constant7nada" (rect 1 0 140 16)(font "Arial" (font_size 10))) + (text "inst3" (rect 8 33 32 44)(font "Arial" )) (port (pt 112 24) (output) - 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(bus) ) (connector - (text "alarm_user" (rect 464 408 475 464)(font "Arial" )(vertical)) + (text "alarm_user" (rect 464 408 475 465)(font "Arial" )(vertical)) (pt 480 408) (pt 480 472) ) (connector - (text "fan_auto" (rect 464 243 475 286)(font "Arial" )(vertical)) + (text "fan_auto" (rect 464 243 475 287)(font "Arial" )(vertical)) (pt 480 240) (pt 480 296) ) @@ -500,4 +701,44 @@ applicable agreement for further details. (pt 232 528) (pt 232 544) ) +(connector + (text "hex3[6..0]" (rect 544 -128 592 -117)(font "Arial" )) + (pt 536 -112) + (pt 584 -112) + (bus) +) +(connector + (text "hex2[6..0]" (rect 544 -112 592 -101)(font "Arial" )) + (pt 536 -96) + (pt 584 -96) + (bus) +) +(connector + (text "hex1[6..0]" (rect 544 -96 592 -85)(font "Arial" )) + (pt 536 -80) + (pt 584 -80) + (bus) +) +(connector + (text "hex0[6..0]" (rect 544 -80 592 -69)(font "Arial" )) + (pt 536 -64) + (pt 584 -64) + (bus) +) +(connector + (text "clk" (rect 344 -128 359 -117)(font "Arial" )) + (pt 392 -112) + (pt 336 -112) +) +(connector + (text "resetn" (rect 344 -112 375 -101)(font "Arial" )) + (pt 392 -96) + (pt 336 -96) +) +(connector + (text "hex5[6..0]" (rect 808 -104 856 -93)(font "Arial" )) + (pt 800 -88) + (pt 872 -88) + (bus) +) (junction (pt 232 528)) diff --git a/FPGA/display/display.bsf b/FPGA/display/display.bsf index ed4adb7..829f8f9 100644 --- a/FPGA/display/display.bsf +++ b/FPGA/display/display.bsf @@ -20,52 +20,101 @@ applicable agreement for further details. */ (header "symbol" (version "1.2")) (symbol - (rect 16 16 192 112) - (text "display" (rect 5 0 46 13)(font "Arial" (font_size 8))) - (text "inst" (rect 8 81 25 92)(font "Arial" )) + (rect 16 16 192 208) + (text "display" (rect 5 0 47 13)(font "Arial" (font_size 8))) + (text "inst" (rect 8 177 26 188)(font "Arial" )) (port (pt 0 32) (input) - (text "fan_auto" (rect 0 0 49 13)(font "Arial" (font_size 8))) - (text "fan_auto" (rect 21 27 70 40)(font "Arial" (font_size 8))) + (text "clk" (rect 0 0 18 13)(font "Arial" (font_size 8))) + (text "clk" (rect 21 27 39 40)(font "Arial" (font_size 8))) (line (pt 0 32)(pt 16 32)) ) (port (pt 0 48) (input) - (text "alarm_user" (rect 0 0 63 13)(font "Arial" (font_size 8))) - (text "alarm_user" (rect 21 43 84 56)(font "Arial" (font_size 8))) + (text "resetn" (rect 0 0 36 13)(font "Arial" (font_size 8))) + (text "resetn" (rect 21 43 57 56)(font "Arial" (font_size 8))) (line (pt 0 48)(pt 16 48)) ) (port (pt 0 64) (input) - (text "speed[1..0]" (rect 0 0 62 13)(font "Arial" (font_size 8))) - (text "speed[1..0]" (rect 21 59 83 72)(font "Arial" (font_size 8))) - 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(rectangle (rect 16 16 160 80)) + (rectangle (rect 16 16 160 176)) ) ) diff --git a/FPGA/display/display.qsf b/FPGA/display/display.qsf index 4a3d072..67f8f87 100644 --- a/FPGA/display/display.qsf +++ b/FPGA/display/display.qsf @@ -112,7 +112,14 @@ set_location_assignment PIN_L6 -to hex7[3] set_location_assignment PIN_L7 -to hex7[4] set_location_assignment PIN_P9 -to hex7[5] set_location_assignment PIN_N9 -to hex7[6] +set_global_assignment -name VHDL_FILE ../vhdl/clock_divider.vhd set_global_assignment -name BDF_FILE display.bdf set_global_assignment -name VHDL_FILE ../vhdl/seven_segment_decoder.vhd set_global_assignment -name TCL_SCRIPT_FILE display_pin.tcl +set_global_assignment -name BDF_FILE useless.bdf +set_global_assignment -name QIP_FILE lpm_shiftreg0.qip +set_global_assignment -name QIP_FILE lpm_constant0.qip +set_global_assignment -name QIP_FILE lpm_constant1.qip +set_global_assignment -name QIP_FILE lpm_constant2.qip +set_global_assignment -name QIP_FILE lpm_constant7nada.qip set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/FPGA/display/display.qws b/FPGA/display/display.qws index 4904320..5e0fdf9 100644 Binary files a/FPGA/display/display.qws and b/FPGA/display/display.qws differ diff --git a/FPGA/display/greybox_tmp/cbx_args.txt b/FPGA/display/greybox_tmp/cbx_args.txt new file mode 100644 index 0000000..736ee27 --- /dev/null +++ b/FPGA/display/greybox_tmp/cbx_args.txt @@ -0,0 +1,7 @@ +LPM_CVALUE=127 +LPM_HINT=ENABLE_RUNTIME_MOD=NO +LPM_TYPE=LPM_CONSTANT +LPM_WIDTH=7 +DEVICE_FAMILY="Cyclone II" +CBX_AUTO_BLACKBOX=ALL +result diff --git a/FPGA/display/lpm_constant7nada.bsf b/FPGA/display/lpm_constant7nada.bsf new file mode 100644 index 0000000..18adea3 --- /dev/null +++ b/FPGA/display/lpm_constant7nada.bsf @@ -0,0 +1,49 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2013 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +(header "symbol" (version "1.2")) +(symbol + (rect 0 0 112 48) + (text "lpm_constant7nada" (rect 1 0 140 16)(font "Arial" (font_size 10))) + (text "inst" (rect 8 33 26 44)(font "Arial" )) + (port + (pt 112 24) + (output) + (text "result[6..0]" (rect 0 0 60 13)(font "Arial" (font_size 8))) + (text "127" (rect 75 18 93 30)(font "Arial" (font_size 8))) + (line (pt 112 24)(pt 96 24)(line_width 3)) + ) + (drawing + (text "7" (rect 99 27 204 64)(font "Arial" )) + (line (pt 106 20)(pt 98 28)) + (line (pt 16 16)(pt 16 32)) + (line (pt 16 16)(pt 96 16)) + (line (pt 16 32)(pt 96 32)) + (line (pt 96 16)(pt 96 32)) + (line (pt 0 0)(pt 114 0)) + (line (pt 114 0)(pt 114 50)) + (line (pt 0 50)(pt 114 50)) + (line (pt 0 0)(pt 0 50)) + (line (pt 0 0)(pt 0 0)) + (line (pt 0 0)(pt 0 0)) + (line (pt 0 0)(pt 0 0)) + (line (pt 0 0)(pt 0 0)) + ) +) diff --git a/FPGA/display/lpm_constant7nada.cmp b/FPGA/display/lpm_constant7nada.cmp new file mode 100644 index 0000000..219d33d --- /dev/null +++ b/FPGA/display/lpm_constant7nada.cmp @@ -0,0 +1,21 @@ +--Copyright (C) 1991-2013 Altera Corporation +--Your use of Altera Corporation's design tools, logic functions +--and other software and tools, and its AMPP partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Altera Program License +--Subscription Agreement, Altera MegaCore Function License +--Agreement, or other applicable license agreement, including, +--without limitation, that your use is for the sole purpose of +--programming logic devices manufactured by Altera and sold by +--Altera or its authorized distributors. Please refer to the +--applicable agreement for further details. + + +component lpm_constant7nada + PORT + ( + result : OUT STD_LOGIC_VECTOR (6 DOWNTO 0) + ); +end component; diff --git a/FPGA/display/lpm_constant7nada.qip b/FPGA/display/lpm_constant7nada.qip new file mode 100644 index 0000000..a844e0c --- /dev/null +++ b/FPGA/display/lpm_constant7nada.qip @@ -0,0 +1,5 @@ +set_global_assignment -name IP_TOOL_NAME "LPM_CONSTANT" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_constant7nada.vhd"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_constant7nada.bsf"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_constant7nada.cmp"] diff --git a/FPGA/display/lpm_constant7nada.vhd b/FPGA/display/lpm_constant7nada.vhd new file mode 100644 index 0000000..8d69572 --- /dev/null +++ b/FPGA/display/lpm_constant7nada.vhd @@ -0,0 +1,109 @@ +-- megafunction wizard: %LPM_CONSTANT% +-- GENERATION: STANDARD +-- VERSION: WM1.0 +-- MODULE: LPM_CONSTANT + +-- ============================================================ +-- File Name: lpm_constant7nada.vhd +-- Megafunction Name(s): +-- LPM_CONSTANT +-- +-- Simulation Library Files(s): +-- lpm +-- ============================================================ +-- ************************************************************ +-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +-- +-- 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition +-- ************************************************************ + + +--Copyright (C) 1991-2013 Altera Corporation +--Your use of Altera Corporation's design tools, logic functions +--and other software and tools, and its AMPP partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Altera Program License +--Subscription Agreement, Altera MegaCore Function License +--Agreement, or other applicable license agreement, including, +--without limitation, that your use is for the sole purpose of +--programming logic devices manufactured by Altera and sold by +--Altera or its authorized distributors. Please refer to the +--applicable agreement for further details. + + +LIBRARY ieee; +USE ieee.std_logic_1164.all; + +LIBRARY lpm; +USE lpm.all; + +ENTITY lpm_constant7nada IS + PORT + ( + result : OUT STD_LOGIC_VECTOR (6 DOWNTO 0) + ); +END lpm_constant7nada; + + +ARCHITECTURE SYN OF lpm_constant7nada IS + + SIGNAL sub_wire0 : STD_LOGIC_VECTOR (6 DOWNTO 0); + + + + COMPONENT lpm_constant + GENERIC ( + lpm_cvalue : NATURAL; + lpm_hint : STRING; + lpm_type : STRING; + lpm_width : NATURAL + ); + PORT ( + result : OUT STD_LOGIC_VECTOR (6 DOWNTO 0) + ); + END COMPONENT; + +BEGIN + result <= sub_wire0(6 DOWNTO 0); + + LPM_CONSTANT_component : LPM_CONSTANT + GENERIC MAP ( + lpm_cvalue => 127, + lpm_hint => "ENABLE_RUNTIME_MOD=NO", + lpm_type => "LPM_CONSTANT", + lpm_width => 7 + ) + PORT MAP ( + result => sub_wire0 + ); + + + +END SYN; + +-- ============================================================ +-- CNX file retrieval info +-- ============================================================ +-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II" +-- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0" +-- Retrieval info: PRIVATE: JTAG_ID STRING "NONE" +-- Retrieval info: PRIVATE: Radix NUMERIC "2" +-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +-- Retrieval info: PRIVATE: Value NUMERIC "127" +-- Retrieval info: PRIVATE: nBit NUMERIC "7" +-- Retrieval info: PRIVATE: new_diagram STRING "1" +-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all +-- Retrieval info: CONSTANT: LPM_CVALUE NUMERIC "127" +-- Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO" +-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_CONSTANT" +-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "7" +-- Retrieval info: USED_PORT: result 0 0 7 0 OUTPUT NODEFVAL "result[6..0]" +-- Retrieval info: CONNECT: result 0 0 7 0 @result 0 0 7 0 +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant7nada.vhd TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant7nada.inc FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant7nada.cmp TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant7nada.bsf TRUE FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant7nada_inst.vhd FALSE +-- Retrieval info: LIB_FILE: lpm diff --git a/FPGA/display/lpm_constant_a.bsf b/FPGA/display/lpm_constant_a.bsf index 068564f..8cf3047 100644 --- a/FPGA/display/lpm_constant_a.bsf +++ b/FPGA/display/lpm_constant_a.bsf @@ -21,17 +21,17 @@ applicable agreement for further details. (header "symbol" (version "1.2")) (symbol (rect 0 0 112 48) - (text "lpm_constant_a" (rect 10 0 120 16)(font "Arial" (font_size 10))) - (text "inst" (rect 8 33 25 44)(font "Arial" )) + (text "lpm_constant_a" (rect 10 0 122 16)(font "Arial" (font_size 10))) + (text "inst" (rect 8 33 26 44)(font "Arial" )) (port (pt 112 24) (output) - (text "result[3..0]" (rect 0 0 58 13)(font "Arial" (font_size 8))) - (text "10" (rect 81 18 91 30)(font "Arial" (font_size 8))) + (text "result[3..0]" (rect 0 0 60 13)(font "Arial" (font_size 8))) + (text "10" (rect 81 18 93 30)(font "Arial" (font_size 8))) (line (pt 112 24)(pt 96 24)(line_width 3)) ) (drawing - (text "4" (rect 99 27 202 64)(font "Arial" )) + (text "4" (rect 99 27 204 64)(font "Arial" )) (line (pt 106 20)(pt 98 28)) (line (pt 16 16)(pt 16 32)) (line (pt 16 16)(pt 96 16)) diff --git a/FPGA/display/lpm_constant_a.qip b/FPGA/display/lpm_constant_a.qip new file mode 100644 index 0000000..d501151 --- /dev/null +++ b/FPGA/display/lpm_constant_a.qip @@ -0,0 +1,5 @@ +set_global_assignment -name IP_TOOL_NAME "LPM_CONSTANT" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_constant_a.vhd"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_constant_a.bsf"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_constant_a.cmp"] diff --git a/FPGA/display/lpm_constant_a.vhd b/FPGA/display/lpm_constant_a.vhd index 85be988..2dbcc00 100644 --- a/FPGA/display/lpm_constant_a.vhd +++ b/FPGA/display/lpm_constant_a.vhd @@ -104,6 +104,6 @@ END SYN; -- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant_a.vhd TRUE -- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant_a.inc FALSE -- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant_a.cmp TRUE --- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant_a.bsf TRUE FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant_a.bsf TRUE -- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_constant_a_inst.vhd FALSE -- Retrieval info: LIB_FILE: lpm diff --git a/FPGA/display/lpm_constant_f.qip b/FPGA/display/lpm_constant_f.qip new file mode 100644 index 0000000..e69de29 diff --git a/FPGA/display/lpm_counter0.qip b/FPGA/display/lpm_counter0.qip new file mode 100644 index 0000000..e69de29 diff --git a/FPGA/display/lpm_shiftreg0.bsf b/FPGA/display/lpm_shiftreg0.bsf new file mode 100644 index 0000000..46b7631 --- /dev/null +++ b/FPGA/display/lpm_shiftreg0.bsf @@ -0,0 +1,86 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2013 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +(header "symbol" (version "1.2")) +(symbol + (rect 0 0 144 128) + (text "lpm_shiftreg0" (rect 33 0 128 16)(font "Arial" (font_size 10))) + (text "inst" (rect 8 113 26 124)(font "Arial" )) + (port + (pt 0 32) + (input) + (text "clock" (rect 0 0 31 13)(font "Arial" (font_size 8))) + (text "clock" (rect 26 26 51 38)(font "Arial" (font_size 8))) + (line (pt 0 32)(pt 16 32)) + ) + (port + (pt 0 48) + (input) + (text "enable" (rect 0 0 38 13)(font "Arial" (font_size 8))) + (text "enable" (rect 20 42 53 54)(font "Arial" (font_size 8))) + (line (pt 0 48)(pt 16 48)) + ) + (port + (pt 0 64) + (input) + (text "shiftin" (rect 0 0 34 13)(font "Arial" (font_size 8))) + (text "shiftin" (rect 20 58 48 70)(font "Arial" (font_size 8))) + (line (pt 0 64)(pt 16 64)) + ) + (port + (pt 112 128) + (input) + (text "aset" (rect 0 0 13 25)(font "Arial" (font_size 8))(vertical)) + (text "aset" (rect 106 86 118 107)(font "Arial" (font_size 8))(vertical)) + (line (pt 112 128)(pt 112 112)) + ) + (port + (pt 144 56) + (output) + (text "shiftout" (rect 0 0 42 13)(font "Arial" (font_size 8))) + (text "shiftout" (rect 91 50 126 62)(font "Arial" (font_size 8))) + (line (pt 144 56)(pt 128 56)) + ) + (port + (pt 144 72) + (output) + (text "q[11..0]" (rect 0 0 42 13)(font "Arial" (font_size 8))) + (text "q[11..0]" (rect 90 66 127 78)(font "Arial" (font_size 8))) + (line (pt 144 72)(pt 128 72)(line_width 3)) + ) + (drawing + (text "left shift" (rect 96 18 227 46)(font "Arial" )) + (text "aset 2080" (rect 87 26 216 62)(font "Arial" )) + (line (pt 16 16)(pt 16 112)) + (line (pt 16 16)(pt 128 16)) + (line (pt 16 112)(pt 128 112)) + (line (pt 128 16)(pt 128 112)) + (line (pt 0 0)(pt 146 0)) + (line (pt 146 0)(pt 146 130)) + (line (pt 0 130)(pt 146 130)) + (line (pt 0 0)(pt 0 130)) + (line (pt 16 26)(pt 22 32)) + (line (pt 22 32)(pt 16 38)) + (line (pt 0 0)(pt 0 0)) + (line (pt 0 0)(pt 0 0)) + (line (pt 0 0)(pt 0 0)) + (line (pt 0 0)(pt 0 0)) + ) +) diff --git a/FPGA/display/lpm_shiftreg0.cmp b/FPGA/display/lpm_shiftreg0.cmp new file mode 100644 index 0000000..cc49c75 --- /dev/null +++ b/FPGA/display/lpm_shiftreg0.cmp @@ -0,0 +1,26 @@ +--Copyright (C) 1991-2013 Altera Corporation +--Your use of Altera Corporation's design tools, logic functions +--and other software and tools, and its AMPP partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Altera Program License +--Subscription Agreement, Altera MegaCore Function License +--Agreement, or other applicable license agreement, including, +--without limitation, that your use is for the sole purpose of +--programming logic devices manufactured by Altera and sold by +--Altera or its authorized distributors. Please refer to the +--applicable agreement for further details. + + +component lpm_shiftreg0 + PORT + ( + aset : IN STD_LOGIC ; + clock : IN STD_LOGIC ; + enable : IN STD_LOGIC ; + shiftin : IN STD_LOGIC ; + q : OUT STD_LOGIC_VECTOR (11 DOWNTO 0); + shiftout : OUT STD_LOGIC + ); +end component; diff --git a/FPGA/display/lpm_shiftreg0.qip b/FPGA/display/lpm_shiftreg0.qip new file mode 100644 index 0000000..9f5eee7 --- /dev/null +++ b/FPGA/display/lpm_shiftreg0.qip @@ -0,0 +1,5 @@ +set_global_assignment -name IP_TOOL_NAME "LPM_SHIFTREG" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.vhd"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.bsf"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.cmp"] diff --git a/FPGA/display/lpm_shiftreg0.vhd b/FPGA/display/lpm_shiftreg0.vhd new file mode 100644 index 0000000..9d71bbc --- /dev/null +++ b/FPGA/display/lpm_shiftreg0.vhd @@ -0,0 +1,146 @@ +-- megafunction wizard: %LPM_SHIFTREG% +-- GENERATION: STANDARD +-- VERSION: WM1.0 +-- MODULE: LPM_SHIFTREG + +-- ============================================================ +-- File Name: lpm_shiftreg0.vhd +-- Megafunction Name(s): +-- LPM_SHIFTREG +-- +-- Simulation Library Files(s): +-- lpm +-- ============================================================ +-- ************************************************************ +-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +-- +-- 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition +-- ************************************************************ + + +--Copyright (C) 1991-2013 Altera Corporation +--Your use of Altera Corporation's design tools, logic functions +--and other software and tools, and its AMPP partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Altera Program License +--Subscription Agreement, Altera MegaCore Function License +--Agreement, or other applicable license agreement, including, +--without limitation, that your use is for the sole purpose of +--programming logic devices manufactured by Altera and sold by +--Altera or its authorized distributors. Please refer to the +--applicable agreement for further details. + + +LIBRARY ieee; +USE ieee.std_logic_1164.all; + +LIBRARY lpm; +USE lpm.all; + +ENTITY lpm_shiftreg0 IS + PORT + ( + aset : IN STD_LOGIC ; + clock : IN STD_LOGIC ; + enable : IN STD_LOGIC ; + shiftin : IN STD_LOGIC ; + q : OUT STD_LOGIC_VECTOR (11 DOWNTO 0); + shiftout : OUT STD_LOGIC + ); +END lpm_shiftreg0; + + +ARCHITECTURE SYN OF lpm_shiftreg0 IS + + SIGNAL sub_wire0 : STD_LOGIC ; + SIGNAL sub_wire1 : STD_LOGIC_VECTOR (11 DOWNTO 0); + + + + COMPONENT lpm_shiftreg + GENERIC ( + lpm_avalue : STRING; + lpm_direction : STRING; + lpm_type : STRING; + lpm_width : NATURAL + ); + PORT ( + clock : IN STD_LOGIC ; + shiftout : OUT STD_LOGIC ; + aset : IN STD_LOGIC ; + enable : IN STD_LOGIC ; + q : OUT STD_LOGIC_VECTOR (11 DOWNTO 0); + shiftin : IN STD_LOGIC + ); + END COMPONENT; + +BEGIN + shiftout <= sub_wire0; + q <= sub_wire1(11 DOWNTO 0); + + LPM_SHIFTREG_component : LPM_SHIFTREG + GENERIC MAP ( + lpm_avalue => "2080", + lpm_direction => "LEFT", + lpm_type => "LPM_SHIFTREG", + lpm_width => 12 + ) + PORT MAP ( + clock => clock, + aset => aset, + enable => enable, + shiftin => shiftin, + shiftout => sub_wire0, + q => sub_wire1 + ); + + + +END SYN; + +-- ============================================================ +-- CNX file retrieval info +-- ============================================================ +-- Retrieval info: PRIVATE: ACLR NUMERIC "0" +-- Retrieval info: PRIVATE: ALOAD NUMERIC "0" +-- Retrieval info: PRIVATE: ASET NUMERIC "1" +-- Retrieval info: PRIVATE: ASET_ALL1 NUMERIC "0" +-- Retrieval info: PRIVATE: CLK_EN NUMERIC "1" +-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II" +-- Retrieval info: PRIVATE: LeftShift NUMERIC "1" +-- Retrieval info: PRIVATE: ParallelDataInput NUMERIC "0" +-- Retrieval info: PRIVATE: Q_OUT NUMERIC "1" +-- Retrieval info: PRIVATE: SCLR NUMERIC "0" +-- Retrieval info: PRIVATE: SLOAD NUMERIC "0" +-- Retrieval info: PRIVATE: SSET NUMERIC "0" +-- Retrieval info: PRIVATE: SSET_ALL1 NUMERIC "1" +-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +-- Retrieval info: PRIVATE: SerialShiftInput NUMERIC "1" +-- Retrieval info: PRIVATE: SerialShiftOutput NUMERIC "1" +-- Retrieval info: PRIVATE: nBit NUMERIC "12" +-- Retrieval info: PRIVATE: new_diagram STRING "1" +-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all +-- Retrieval info: CONSTANT: LPM_AVALUE STRING "2080" +-- Retrieval info: CONSTANT: LPM_DIRECTION STRING "LEFT" +-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_SHIFTREG" +-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "12" +-- Retrieval info: USED_PORT: aset 0 0 0 0 INPUT NODEFVAL "aset" +-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock" +-- Retrieval info: USED_PORT: enable 0 0 0 0 INPUT NODEFVAL "enable" +-- Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL "q[11..0]" +-- Retrieval info: USED_PORT: shiftin 0 0 0 0 INPUT NODEFVAL "shiftin" +-- Retrieval info: USED_PORT: shiftout 0 0 0 0 OUTPUT NODEFVAL "shiftout" +-- Retrieval info: CONNECT: @aset 0 0 0 0 aset 0 0 0 0 +-- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +-- Retrieval info: CONNECT: @enable 0 0 0 0 enable 0 0 0 0 +-- Retrieval info: CONNECT: @shiftin 0 0 0 0 shiftin 0 0 0 0 +-- Retrieval info: CONNECT: q 0 0 12 0 @q 0 0 12 0 +-- Retrieval info: CONNECT: shiftout 0 0 0 0 @shiftout 0 0 0 0 +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.vhd TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.inc FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.cmp TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.bsf TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0_inst.vhd FALSE +-- Retrieval info: LIB_FILE: lpm diff --git a/FPGA/display/useless.bdf b/FPGA/display/useless.bdf new file mode 100644 index 0000000..bdd35ff --- /dev/null +++ b/FPGA/display/useless.bdf @@ -0,0 +1,968 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2013 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +(header "graphic" (version "1.4")) +(pin + (input) + (rect 24 16 200 32) + (text "INPUT" (rect 133 0 162 10)(font "Arial" (font_size 6))) + (text "clk" (rect 9 0 24 11)(font "Arial" )) + (pt 176 8) + (drawing + (line (pt 92 12)(pt 117 12)) + (line (pt 92 4)(pt 117 4)) + (line (pt 121 8)(pt 176 8)) + (line (pt 92 12)(pt 92 4)) + (line (pt 117 4)(pt 121 8)) + (line (pt 117 12)(pt 121 8)) + ) + (text "VCC" (rect 136 7 157 17)(font "Arial" (font_size 6))) +) +(pin + (input) + (rect 24 32 200 48) + (text "INPUT" (rect 133 0 162 10)(font "Arial" (font_size 6))) + (text "resetn" (rect 9 0 40 11)(font "Arial" )) + (pt 176 8) + (drawing + (line (pt 92 12)(pt 117 12)) + (line (pt 92 4)(pt 117 4)) + (line (pt 121 8)(pt 176 8)) + (line (pt 92 12)(pt 92 4)) + (line (pt 117 4)(pt 121 8)) + (line (pt 117 12)(pt 121 8)) + ) + (text "VCC" (rect 136 7 157 17)(font "Arial" (font_size 6))) +) +(pin + (output) + (rect 24 112 200 128) + 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