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authorPacien TRAN-GIRARD2014-06-13 16:06:19 +0200
committerPacien TRAN-GIRARD2014-06-13 16:06:19 +0200
commit70318492f3472ff2ec3b1735cf69a4eef1f6a51d (patch)
tree0f4243099ea9379bc164dc37a9fee3ab255f0f7e /FPGA/display/display.qsf
parentd091bb2cb82f66d187df8f3aba6afcf4041b72ce (diff)
downloadfpga-home-automation-70318492f3472ff2ec3b1735cf69a4eef1f6a51d.tar.gz
Update project
Diffstat (limited to 'FPGA/display/display.qsf')
-rw-r--r--FPGA/display/display.qsf7
1 files changed, 7 insertions, 0 deletions
diff --git a/FPGA/display/display.qsf b/FPGA/display/display.qsf
index 4a3d072..67f8f87 100644
--- a/FPGA/display/display.qsf
+++ b/FPGA/display/display.qsf
@@ -112,7 +112,14 @@ set_location_assignment PIN_L6 -to hex7[3]
112set_location_assignment PIN_L7 -to hex7[4] 112set_location_assignment PIN_L7 -to hex7[4]
113set_location_assignment PIN_P9 -to hex7[5] 113set_location_assignment PIN_P9 -to hex7[5]
114set_location_assignment PIN_N9 -to hex7[6] 114set_location_assignment PIN_N9 -to hex7[6]
115set_global_assignment -name VHDL_FILE ../vhdl/clock_divider.vhd
115set_global_assignment -name BDF_FILE display.bdf 116set_global_assignment -name BDF_FILE display.bdf
116set_global_assignment -name VHDL_FILE ../vhdl/seven_segment_decoder.vhd 117set_global_assignment -name VHDL_FILE ../vhdl/seven_segment_decoder.vhd
117set_global_assignment -name TCL_SCRIPT_FILE display_pin.tcl 118set_global_assignment -name TCL_SCRIPT_FILE display_pin.tcl
119set_global_assignment -name BDF_FILE useless.bdf
120set_global_assignment -name QIP_FILE lpm_shiftreg0.qip
121set_global_assignment -name QIP_FILE lpm_constant0.qip
122set_global_assignment -name QIP_FILE lpm_constant1.qip
123set_global_assignment -name QIP_FILE lpm_constant2.qip
124set_global_assignment -name QIP_FILE lpm_constant7nada.qip
118set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file 125set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file