Add display module

1 files changed, 49 insertions, 0 deletions

diff --git a/FPGA/display/seven_segment_decoder.bsf b/FPGA/display/seven_segment_decoder.bsf
new file mode 100644
index 0000000..2b2db67
--- /dev/null
+++ b/FPGA/display/seven_segment_decoder.bsf
@@ -0,0 +1,49 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2013 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions 
+and other software and tools, and its AMPP partner logic 
+functions, and any output files from any of the foregoing 
+(including device programming or simulation files), and any 
+associated documentation or information are expressly subject 
+to the terms and conditions of the Altera Program License 
+Subscription Agreement, Altera MegaCore Function License 
+Agreement, or other applicable license agreement, including, 
+without limitation, that your use is for the sole purpose of 
+programming logic devices manufactured by Altera and sold by 
+Altera or its authorized distributors.  Please refer to the 
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+        (rect 16 16 192 96)
+        (text "seven_segment_decoder" (rect 5 0 107 12)(font "Arial" ))
+        (text "inst" (rect 8 64 20 76)(font "Arial" ))
+        (port
+                (pt 0 32)
+                (input)
+                (text "hexa[3..0]" (rect 0 0 38 12)(font "Arial" ))
+                (text "hexa[3..0]" (rect 21 27 59 39)(font "Arial" ))
+                (line (pt 0 32)(pt 16 32)(line_width 3))
+        )
+        (port
+                (pt 176 32)
+                (output)
+                (text "hex[6..0]" (rect 0 0 34 12)(font "Arial" ))
+                (text "hex[6..0]" (rect 121 27 155 39)(font "Arial" ))
+                (line (pt 176 32)(pt 160 32)(line_width 3))
+        )
+        (parameter
+                "active_low"
+                "true"
+                ""
+                (type "PARAMETER_ENUM") )
+        (drawing
+                (rectangle (rect 16 16 160 64)(line_width 1))
+        )
+        (annotation_block (parameter)(rect 192 -64 292 16))
+)