Update project

1 files changed, 23 insertions, 0 deletions

diff --git a/FPGA/pwm/lpm_counter0.cmp b/FPGA/pwm/lpm_counter0.cmp
new file mode 100644
index 0000000..f505116
--- /dev/null
+++ b/FPGA/pwm/lpm_counter0.cmp
@@ -0,0 +1,23 @@
+--Copyright (C) 1991-2013 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files from any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+component lpm_counter0
+        PORT
+        (
+                aclr            : IN STD_LOGIC ;
+                clock           : IN STD_LOGIC ;
+                q               : OUT STD_LOGIC_VECTOR (18 DOWNTO 0)
+        );
+end component;