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-rw-r--r--FPGA/top/7seg_pin.tcl56
-rw-r--r--FPGA/top/LCD_controller.bsf141
-rw-r--r--FPGA/top/clock_divider.bsf61
-rw-r--r--FPGA/top/codec_clock.bsf50
-rw-r--r--FPGA/top/codec_clock.qsf78
-rw-r--r--FPGA/top/codec_config.bsf75
-rw-r--r--FPGA/top/codec_dac.bsf113
-rw-r--r--FPGA/top/commande.bsf99
-rw-r--r--FPGA/top/dds_sinus.bsf68
-rw-r--r--FPGA/top/demo_io_pin.tcl17
-rw-r--r--FPGA/top/display.bsf120
-rw-r--r--FPGA/top/greybox_tmp/cbx_args.txt9
-rw-r--r--FPGA/top/lcd_message.bsf85
-rw-r--r--FPGA/top/lcd_pin.tcl13
-rw-r--r--FPGA/top/lpm_compare0.bsf62
-rw-r--r--FPGA/top/lpm_counter0.bsf64
-rw-r--r--FPGA/top/lpm_counter1.bsf65
-rw-r--r--FPGA/top/lpm_counter1.qip0
-rw-r--r--FPGA/top/lpm_mux0.bsf82
-rw-r--r--FPGA/top/message.bsf43
-rw-r--r--FPGA/top/pwm.bsf64
-rw-r--r--FPGA/top/real_io_pin.tcl22
-rw-r--r--FPGA/top/sound_gene.bsf113
-rw-r--r--FPGA/top/top.qsf54
-rw-r--r--FPGA/top/top.qwsbin0 -> 2997 bytes
-rw-r--r--FPGA/top/top.srf1
-rw-r--r--FPGA/top/top.tcl56
-rw-r--r--FPGA/top/useless.bsf71
28 files changed, 32 insertions, 1650 deletions
diff --git a/FPGA/top/7seg_pin.tcl b/FPGA/top/7seg_pin.tcl
deleted file mode 100644
index 317ef52..0000000
--- a/FPGA/top/7seg_pin.tcl
+++ /dev/null
@@ -1,56 +0,0 @@
1set_location_assignment PIN_AF10 -to hex0[0]
2set_location_assignment PIN_AB12 -to hex0[1]
3set_location_assignment PIN_AC12 -to hex0[2]
4set_location_assignment PIN_AD11 -to hex0[3]
5set_location_assignment PIN_AE11 -to hex0[4]
6set_location_assignment PIN_V14 -to hex0[5]
7set_location_assignment PIN_V13 -to hex0[6]
8set_location_assignment PIN_V20 -to hex1[0]
9set_location_assignment PIN_V21 -to hex1[1]
10set_location_assignment PIN_W21 -to hex1[2]
11set_location_assignment PIN_Y22 -to hex1[3]
12set_location_assignment PIN_AA24 -to hex1[4]
13set_location_assignment PIN_AA23 -to hex1[5]
14set_location_assignment PIN_AB24 -to hex1[6]
15set_location_assignment PIN_AB23 -to hex2[0]
16set_location_assignment PIN_V22 -to hex2[1]
17set_location_assignment PIN_AC25 -to hex2[2]
18set_location_assignment PIN_AC26 -to hex2[3]
19set_location_assignment PIN_AB26 -to hex2[4]
20set_location_assignment PIN_AB25 -to hex2[5]
21set_location_assignment PIN_Y24 -to hex2[6]
22set_location_assignment PIN_Y23 -to hex3[0]
23set_location_assignment PIN_AA25 -to hex3[1]
24set_location_assignment PIN_AA26 -to hex3[2]
25set_location_assignment PIN_Y26 -to hex3[3]
26set_location_assignment PIN_Y25 -to hex3[4]
27set_location_assignment PIN_U22 -to hex3[5]
28set_location_assignment PIN_W24 -to hex3[6]
29set_location_assignment PIN_U9 -to hex4[0]
30set_location_assignment PIN_U1 -to hex4[1]
31set_location_assignment PIN_U2 -to hex4[2]
32set_location_assignment PIN_T4 -to hex4[3]
33set_location_assignment PIN_R7 -to hex4[4]
34set_location_assignment PIN_R6 -to hex4[5]
35set_location_assignment PIN_T3 -to hex4[6]
36set_location_assignment PIN_T2 -to hex5[0]
37set_location_assignment PIN_P6 -to hex5[1]
38set_location_assignment PIN_P7 -to hex5[2]
39set_location_assignment PIN_T9 -to hex5[3]
40set_location_assignment PIN_R5 -to hex5[4]
41set_location_assignment PIN_R4 -to hex5[5]
42set_location_assignment PIN_R3 -to hex5[6]
43set_location_assignment PIN_R2 -to hex6[0]
44set_location_assignment PIN_P4 -to hex6[1]
45set_location_assignment PIN_P3 -to hex6[2]
46set_location_assignment PIN_M2 -to hex6[3]
47set_location_assignment PIN_M3 -to hex6[4]
48set_location_assignment PIN_M5 -to hex6[5]
49set_location_assignment PIN_M4 -to hex6[6]
50set_location_assignment PIN_L3 -to hex7[0]
51set_location_assignment PIN_L2 -to hex7[1]
52set_location_assignment PIN_L9 -to hex7[2]
53set_location_assignment PIN_L6 -to hex7[3]
54set_location_assignment PIN_L7 -to hex7[4]
55set_location_assignment PIN_P9 -to hex7[5]
56set_location_assignment PIN_N9 -to hex7[6] \ No newline at end of file
diff --git a/FPGA/top/LCD_controller.bsf b/FPGA/top/LCD_controller.bsf
deleted file mode 100644
index 9f6a194..0000000
--- a/FPGA/top/LCD_controller.bsf
+++ /dev/null
@@ -1,141 +0,0 @@
1/*
2WARNING: Do NOT edit the input and output ports in this file in a text
3editor if you plan to continue editing the block that represents it in
4the Block Editor! File corruption is VERY likely to occur.
5*/
6/*
7Copyright (C) 1991-2013 Altera Corporation
8Your use of Altera Corporation's design tools, logic functions
9and other software and tools, and its AMPP partner logic
10functions, and any output files from any of the foregoing
11(including device programming or simulation files), and any
12associated documentation or information are expressly subject
13to the terms and conditions of the Altera Program License
14Subscription Agreement, Altera MegaCore Function License
15Agreement, or other applicable license agreement, including,
16without limitation, that your use is for the sole purpose of
17programming logic devices manufactured by Altera and sold by
18Altera or its authorized distributors. Please refer to the
19applicable agreement for further details.
20*/
21(header "symbol" (version "1.1"))
22(symbol
23 (rect 16 16 232 256)
24 (text "LCD_controller" (rect 5 0 66 12)(font "Arial" ))
25 (text "inst" (rect 8 224 20 236)(font "Arial" ))
26 (port
27 (pt 0 32)
28 (input)
29 (text "clk" (rect 0 0 10 12)(font "Arial" ))
30 (text "clk" (rect 21 27 31 39)(font "Arial" ))
31 (line (pt 0 32)(pt 16 32)(line_width 1))
32 )
33 (port
34 (pt 0 48)
35 (input)
36 (text "resetn" (rect 0 0 24 12)(font "Arial" ))
37 (text "resetn" (rect 21 43 45 55)(font "Arial" ))
38 (line (pt 0 48)(pt 16 48)(line_width 1))
39 )
40 (port
41 (pt 0 64)
42 (input)
43 (text "en_250kHz" (rect 0 0 44 12)(font "Arial" ))
44 (text "en_250kHz" (rect 21 59 65 71)(font "Arial" ))
45 (line (pt 0 64)(pt 16 64)(line_width 1))
46 )
47 (port
48 (pt 0 80)
49 (input)
50 (text "mode[1..0]" (rect 0 0 41 12)(font "Arial" ))
51 (text "mode[1..0]" (rect 21 75 62 87)(font "Arial" ))
52 (line (pt 0 80)(pt 16 80)(line_width 3))
53 )
54 (port
55 (pt 0 96)
56 (input)
57 (text "char[7..0]" (rect 0 0 37 12)(font "Arial" ))
58 (text "char[7..0]" (rect 21 91 58 103)(font "Arial" ))
59 (line (pt 0 96)(pt 16 96)(line_width 3))
60 )
61 (port
62 (pt 0 112)
63 (input)
64 (text "address[6..0]" (rect 0 0 51 12)(font "Arial" ))
65 (text "address[6..0]" (rect 21 107 72 119)(font "Arial" ))
66 (line (pt 0 112)(pt 16 112)(line_width 3))
67 )
68 (port
69 (pt 0 128)
70 (input)
71 (text "write_char" (rect 0 0 41 12)(font "Arial" ))
72 (text "write_char" (rect 21 123 62 135)(font "Arial" ))
73 (line (pt 0 128)(pt 16 128)(line_width 1))
74 )
75 (port
76 (pt 0 144)
77 (input)
78 (text "write_address" (rect 0 0 55 12)(font "Arial" ))
79 (text "write_address" (rect 21 139 76 151)(font "Arial" ))
80 (line (pt 0 144)(pt 16 144)(line_width 1))
81 )
82 (port
83 (pt 0 160)
84 (input)
85 (text "D" (rect 0 0 7 12)(font "Arial" ))
86 (text "D" (rect 21 155 28 167)(font "Arial" ))
87 (line (pt 0 160)(pt 16 160)(line_width 1))
88 )
89 (port
90 (pt 0 176)
91 (input)
92 (text "C" (rect 0 0 7 12)(font "Arial" ))
93 (text "C" (rect 21 171 28 183)(font "Arial" ))
94 (line (pt 0 176)(pt 16 176)(line_width 1))
95 )
96 (port
97 (pt 0 192)
98 (input)
99 (text "B" (rect 0 0 5 12)(font "Arial" ))
100 (text "B" (rect 21 187 26 199)(font "Arial" ))
101 (line (pt 0 192)(pt 16 192)(line_width 1))
102 )
103 (port
104 (pt 216 32)
105 (output)
106 (text "ready" (rect 0 0 23 12)(font "Arial" ))
107 (text "ready" (rect 172 27 195 39)(font "Arial" ))
108 (line (pt 216 32)(pt 200 32)(line_width 1))
109 )
110 (port
111 (pt 216 64)
112 (output)
113 (text "LCD_RS" (rect 0 0 40 12)(font "Arial" ))
114 (text "LCD_RS" (rect 155 59 195 71)(font "Arial" ))
115 (line (pt 216 64)(pt 200 64)(line_width 1))
116 )
117 (port
118 (pt 216 80)
119 (output)
120 (text "LCD_RW" (rect 0 0 44 12)(font "Arial" ))
121 (text "LCD_RW" (rect 151 75 195 87)(font "Arial" ))
122 (line (pt 216 80)(pt 200 80)(line_width 1))
123 )
124 (port
125 (pt 216 96)
126 (output)
127 (text "LCD_EN" (rect 0 0 40 12)(font "Arial" ))
128 (text "LCD_EN" (rect 155 91 195 103)(font "Arial" ))