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authorPacien TRAN-GIRARD2014-04-11 22:57:17 +0200
committerPacien TRAN-GIRARD2014-04-11 22:57:17 +0200
commitd091bb2cb82f66d187df8f3aba6afcf4041b72ce (patch)
tree31a6df402f4b6737c2bdae043b6538ca8335b1d7 /FPGA
parent693a38c41f26c27e54a7e8b96c550eaf6008b56f (diff)
downloadfpga-home-automation-d091bb2cb82f66d187df8f3aba6afcf4041b72ce.tar.gz
Add top module
Diffstat (limited to 'FPGA')
-rw-r--r--FPGA/display/display.bsf71
-rw-r--r--FPGA/display/display.qwsbin0 -> 1438 bytes
-rw-r--r--FPGA/top/7seg_pin.tcl56
-rw-r--r--FPGA/top/commande.bsf99
-rw-r--r--FPGA/top/demo_io_pin.tcl17
-rw-r--r--FPGA/top/display.bsf71
-rw-r--r--FPGA/top/lcd_pin.tcl13
-rw-r--r--FPGA/top/real_io_pin.tcl22
-rw-r--r--FPGA/top/top.bdf443
-rw-r--r--FPGA/top/top.qpf30
-rw-r--r--FPGA/top/top.qsf161
11 files changed, 983 insertions, 0 deletions
diff --git a/FPGA/display/display.bsf b/FPGA/display/display.bsf
new file mode 100644
index 0000000..ed4adb7
--- /dev/null
+++ b/FPGA/display/display.bsf
@@ -0,0 +1,71 @@
1/*
2WARNING: Do NOT edit the input and output ports in this file in a text
3editor if you plan to continue editing the block that represents it in
4the Block Editor! File corruption is VERY likely to occur.
5*/
6/*
7Copyright (C) 1991-2013 Altera Corporation
8Your use of Altera Corporation's design tools, logic functions
9and other software and tools, and its AMPP partner logic
10functions, and any output files from any of the foregoing
11(including device programming or simulation files), and any
12associated documentation or information are expressly subject
13to the terms and conditions of the Altera Program License
14Subscription Agreement, Altera MegaCore Function License
15Agreement, or other applicable license agreement, including,
16without limitation, that your use is for the sole purpose of
17programming logic devices manufactured by Altera and sold by
18Altera or its authorized distributors. Please refer to the
19applicable agreement for further details.
20*/
21(header "symbol" (version "1.2"))
22(symbol
23 (rect 16 16 192 112)
24 (text "display" (rect 5 0 46 13)(font "Arial" (font_size 8)))
25 (text "inst" (rect 8 81 25 92)(font "Arial" ))
26 (port
27 (pt 0 32)
28 (input)
29 (text "fan_auto" (rect 0 0 49 13)(font "Arial" (font_size 8)))
30 (text "fan_auto" (rect 21 27 70 40)(font "Arial" (font_size 8)))
31 (line (pt 0 32)(pt 16 32))
32 )
33 (port
34 (pt 0 48)
35 (input)
36 (text "alarm_user" (rect 0 0 63 13)(font "Arial" (font_size 8)))
37 (text "alarm_user" (rect 21 43 84 56)(font "Arial" (font_size 8)))
38 (line (pt 0 48)(pt 16 48))
39 )
40 (port
41 (pt 0 64)
42 (input)
43 (text "speed[1..0]" (rect 0 0 62 13)(font "Arial" (font_size 8)))
44 (text "speed[1..0]" (rect 21 59 83 72)(font "Arial" (font_size 8)))
45 (line (pt 0 64)(pt 16 64)(line_width 3))
46 )
47 (port
48 (pt 176 32)
49 (output)
50 (text "hex7[6..0]" (rect 0 0 55 13)(font "Arial" (font_size 8)))
51 (text "hex7[6..0]" (rect 100 27 155 40)(font "Arial" (font_size 8)))
52 (line (pt 176 32)(pt 160 32)(line_width 3))
53 )
54 (port
55 (pt 176 48)
56 (output)
57 (text "hex6[6..0]" (rect 0 0 55 13)(font "Arial" (font_size 8)))
58 (text "hex6[6..0]" (rect 100 43 155 56)(font "Arial" (font_size 8)))
59 (line (pt 176 48)(pt 160 48)(line_width 3))
60 )
61 (port
62 (pt 176 64)
63 (output)
64 (text "hex4[6..0]" (rect 0 0 55 13)(font "Arial" (font_size 8)))
65 (text "hex4[6..0]" (rect 100 59 155 72)(font "Arial" (font_size 8)))
66 (line (pt 176 64)(pt 160 64)(line_width 3))
67 )
68 (drawing
69 (rectangle (rect 16 16 160 80))
70 )
71)
diff --git a/FPGA/display/display.qws b/FPGA/display/display.qws
new file mode 100644
index 0000000..4904320
--- /dev/null
+++ b/FPGA/display/display.qws
Binary files differ
diff --git a/FPGA/top/7seg_pin.tcl b/FPGA/top/7seg_pin.tcl
new file mode 100644
index 0000000..317ef52
--- /dev/null
+++ b/FPGA/top/7seg_pin.tcl
@@ -0,0 +1,56 @@
1set_location_assignment PIN_AF10 -to hex0[0]
2set_location_assignment PIN_AB12 -to hex0[1]
3set_location_assignment PIN_AC12 -to hex0[2]
4set_location_assignment PIN_AD11 -to hex0[3]
5set_location_assignment PIN_AE11 -to hex0[4]
6set_location_assignment PIN_V14 -to hex0[5]
7set_location_assignment PIN_V13 -to hex0[6]
8set_location_assignment PIN_V20 -to hex1[0]
9set_location_assignment PIN_V21 -to hex1[1]
10set_location_assignment PIN_W21 -to hex1[2]
11set_location_assignment PIN_Y22 -to hex1[3]
12set_location_assignment PIN_AA24 -to hex1[4]
13set_location_assignment PIN_AA23 -to hex1[5]
14set_location_assignment PIN_AB24 -to hex1[6]
15set_location_assignment PIN_AB23 -to hex2[0]
16set_location_assignment PIN_V22 -to hex2[1]
17set_location_assignment PIN_AC25 -to hex2[2]
18set_location_assignment PIN_AC26 -to hex2[3]
19set_location_assignment PIN_AB26 -to hex2[4]
20set_location_assignment PIN_AB25 -to hex2[5]
21set_location_assignment PIN_Y24 -to hex2[6]
22set_location_assignment PIN_Y23 -to hex3[0]
23set_location_assignment PIN_AA25 -to hex3[1]
24set_location_assignment PIN_AA26 -to hex3[2]
25set_location_assignment PIN_Y26 -to hex3[3]
26set_location_assignment PIN_Y25 -to hex3[4]
27set_location_assignment PIN_U22 -to hex3[5]
28set_location_assignment PIN_W24 -to hex3[6]
29set_location_assignment PIN_U9 -to hex4[0]
30set_location_assignment PIN_U1 -to hex4[1]
31set_location_assignment PIN_U2 -to hex4[2]
32set_location_assignment PIN_T4 -to hex4[3]
33set_location_assignment PIN_R7 -to hex4[4]
34set_location_assignment PIN_R6 -to hex4[5]
35set_location_assignment PIN_T3 -to hex4[6]
36set_location_assignment PIN_T2 -to hex5[0]
37set_location_assignment PIN_P6 -to hex5[1]
38set_location_assignment PIN_P7 -to hex5[2]
39set_location_assignment PIN_T9 -to hex5[3]
40set_location_assignment PIN_R5 -to hex5[4]
41set_location_assignment PIN_R4 -to hex5[5]
42set_location_assignment PIN_R3 -to hex5[6]
43set_location_assignment PIN_R2 -to hex6[0]
44set_location_assignment PIN_P4 -to hex6[1]
45set_location_assignment PIN_P3 -to hex6[2]
46set_location_assignment PIN_M2 -to hex6[3]
47set_location_assignment PIN_M3 -to hex6[4]
48set_location_assignment PIN_M5 -to hex6[5]
49set_location_assignment PIN_M4 -to hex6[6]
50set_location_assignment PIN_L3 -to hex7[0]
51set_location_assignment PIN_L2 -to hex7[1]
52set_location_assignment PIN_L9 -to hex7[2]
53set_location_assignment PIN_L6 -to hex7[3]
54set_location_assignment PIN_L7 -to hex7[4]
55set_location_assignment PIN_P9 -to hex7[5]
56set_location_assignment PIN_N9 -to hex7[6] \ No newline at end of file
diff --git a/FPGA/top/commande.bsf b/FPGA/top/commande.bsf
new file mode 100644
index 0000000..54f329e
--- /dev/null
+++ b/FPGA/top/commande.bsf
@@ -0,0 +1,99 @@
1/*
2WARNING: Do NOT edit the input and output ports in this file in a text
3editor if you plan to continue editing the block that represents it in
4the Block Editor! File corruption is VERY likely to occur.
5*/
6/*
7Copyright (C) 1991-2013 Altera Corporation
8Your use of Altera Corporation's design tools, logic functions
9and other software and tools, and its AMPP partner logic
10functions, and any output files from any of the foregoing
11(including device programming or simulation files), and any
12associated documentation or information are expressly subject
13to the terms and conditions of the Altera Program License
14Subscription Agreement, Altera MegaCore Function License
15Agreement, or other applicable license agreement, including,
16without limitation, that your use is for the sole purpose of
17programming logic devices manufactured by Altera and sold by
18Altera or its authorized distributors. Please refer to the
19applicable agreement for further details.
20*/
21(header "symbol" (version "1.2"))
22(symbol
23 (rect 16 16 232 176)
24 (text "commande" (rect 5 0 67 13)(font "Arial" (font_size 8)))
25 (text "inst" (rect 8 145 25 156)(font "Arial" ))
26 (port
27 (pt 0 32)
28 (input)
29 (text "clk" (rect 0 0 17 13)(font "Arial" (font_size 8)))
30 (text "clk" (rect 21 27 38 40)(font "Arial" (font_size 8)))
31 (line (pt 0 32)(pt 16 32))
32 )
33 (port
34 (pt 0 48)
35 (input)
36 (text "resetn" (rect 0 0 35 13)(font "Arial" (font_size 8)))
37 (text "resetn" (rect 21 43 56 56)(font "Arial" (font_size 8)))
38 (line (pt 0 48)(pt 16 48))
39 )
40 (port
41 (pt 0 64)
42 (input)
43 (text "speed_user[1..0]" (rect 0 0 94 13)(font "Arial" (font_size 8)))
44 (text "speed_user[1..0]" (rect 21 59 115 72)(font "Arial" (font_size 8)))
45 (line (pt 0 64)(pt 16 64)(line_width 3))
46 )
47 (port
48 (pt 0 80)
49 (input)
50 (text "fan_auto_user" (rect 0 0 81 13)(font "Arial" (font_size 8)))
51 (text "fan_auto_user" (rect 21 75 102 88)(font "Arial" (font_size 8)))
52 (line (pt 0 80)(pt 16 80))
53 )
54 (port
55 (pt 0 96)
56 (input)
57 (text "alarm_user" (rect 0 0 63 13)(font "Arial" (font_size 8)))
58 (text "alarm_user" (rect 21 91 84 104)(font "Arial" (font_size 8)))
59 (line (pt 0 96)(pt 16 96))
60 )
61 (port
62 (pt 0 112)
63 (input)
64 (text "hot" (rect 0 0 17 13)(font "Arial" (font_size 8)))
65 (text "hot" (rect 21 107 38 120)(font "Arial" (font_size 8)))
66 (line (pt 0 112)(pt 16 112))
67 )
68 (port
69 (pt 0 128)
70 (input)
71 (text "sound_high_level" (rect 0 0 97 13)(font "Arial" (font_size 8)))
72 (text "sound_high_level" (rect 21 123 118 136)(font "Arial" (font_size 8)))
73 (line (pt 0 128)(pt 16 128))
74 )
75 (port
76 (pt 216 32)
77 (output)